SoC/ASIC/FPGA Design Verification
- Verification Strategy and Verification Planning
- SV/UVM/C Verification Environment Architecture and Development
- Functional Coverage/Sequences/Assertions/Test Cases Development
- Functional and Code Coverage Closure, Gate level simulations, Verification Signoff
- Performance, Safety, Security, Formal and Low Power Verification
- Verification IP Development
- Verification Reviews and Audit
- Specialized Consulting in various domains like USB, PCIe, 10GbE, DDR, RISC Processors, Next Gen SONET/SDH/OTN, Wireless, 5G, Image processing and AI/IOT.
Silicon to Systems – Architecture, Design, Verification Planning, Verification Environment Development, Coverage Closure & Verification Signoff .