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We encourage employees to be creative, driven, and take initiative. Joining P&C, with us, you will enjoy meaningful opportunities to advance your career and opportunities to work with cutting-edge technologies. As an ambitious team of professionals operating in an exciting and global environment, we are looking for passionate, talented people who will embrace the learning opportunities, challenges, and job skills that we provide.

P&C Tech Employee Benefits

P&C is an equal opportunity provider – we provide equal opportunity to applicants and employees without regard to race, color, religion, sex, age, sexual orientation, national origin, disability etc., under applicable local laws.

Stock Options
Global Relocations
Medical Insurance
Holidays & Vacations
Sick/Casual Leaves

Positions Currently Open

Senior RTL Design Engineer
Department:
Semiconductors
Experience:
5+yrs
Location:
India
Compensation:
As per Industry Standards
Skills / Experience

You will have 5 or more years of experience in logic design with the following qualifications:

  •  RTL design using Verilog or SystemVerilog, assertion writing
  •  Design of state machines, data paths, arbitration and clock domain crossing logic
  •  Logic synthesis, timing constraints
  •  Exposure to Design For Test, understanding of scan concept and writing DFT friendly RTL
  •  Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking
  •  Prior experience in 10G/100G Ethernet design is a plus
Send your resume to hr.eu@p-ctech.com to apply
RTL Design Engineer
Department:
Semiconductors
Experience:
2 yrs
Location:
India
Compensation:
As per Industry Standards
Skills / Experience

You will have 2 years of experience in logic design with the following qualifications:

  •  RTL design using Verilog or SystemVerilog, assertion writing
  •  Design of state machines, data paths, arbitration and clock domain crossing logic
  •  Logic synthesis, timing constraints
  •  Exposure to Design For Test, understanding of scan concept and writing DFT friendly RTL
  •  Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking
  •  Prior experience in 10G/100G Ethernet design is a plus
Send your resume to hr.eu@p-ctech.com to apply
Verification Lead
Department:
Semiconductors
Experience:
9 yrs
Location:
India
Compensation:
As per Industry Standards
Skills / Experience
  •  Excellent communication and interpersonal skills
  •  9 years of experience in Verification with hands on in ASIC Verification, SV/UVM methodology
  •  Creative problem solving
  •  Team player
  •  Strong and effective presentation skills, able to operate at multiple levels including senior management
  •  Experience in SoC /IP level Verification needed
  •  CPU verification is added advantage
  •  Writing /debugging C and assembly tests desirable
  •  Excellent RTL debugging Skills
  •  Self-motivated
  •  Take ownership of problems
Send your resume to hr.eu@p-ctech.com to apply
Senior Verification Engineer
Department:
Semiconductors
Experience:
5+yrs
Location:
India
Compensation:
As per Industry Standards
Skills / Experience
  •  Excellent communication and interpersonal skills
  •  5 or more years of experience in Verification with hands on in ASIC Verification, SV/UVM methodology
  •  Creative problem solving
  •  Team player
  •  Strong and effective presentation skills, able to operate at multiple levels including senior management
  •  Experience in SoC /IP level Verification needed
  •  CPU verification is added advantage
  •  Writing /debugging C and assembly tests desirable
  •  Excellent RTL debugging Skills
  •  Self-motivated
  •  Take ownership of problems
Send your resume to hr.eu@p-ctech.com to apply
Senior RTL Design Engineer
Department:
Semiconductors
Experience:
5+yrs
Location:
UK & EU
Compensation:
As per Industry Standards
Skills / Experience

You will have 5 or more years of experience in logic design with the following qualifications:

  •  RTL design using Verilog or SystemVerilog, assertion writing
  •  Design of state machines, data paths, arbitration and clock domain crossing logic
  •  Logic synthesis, timing constraints
  •  Exposure to Design For Test, understanding of scan concept and writing DFT friendly RTL
  •  Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking
  •  Prior experience in 10G/100G Ethernet design is a plus
Send your resume to hr.eu@p-ctech.com to apply
RTL Design Engineer
Department:
Semiconductors
Experience:
2 yrs
Location:
UK & EU
Compensation:
As per Industry Standards
Skills / Experience

You will have 2 years of experience in logic design with the following qualifications:

  •  RTL design using Verilog or SystemVerilog, assertion writing
  •  Design of state machines, data paths, arbitration and clock domain crossing logic
  •  Logic synthesis, timing constraints
  •  Exposure to Design For Test, understanding of scan concept and writing DFT friendly RTL
  •  Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking
  •  Prior experience in 10G/100G Ethernet design is a plus
Send your resume to hr.eu@p-ctech.com to apply
Verification Lead
Department:
Semiconductors
Experience:
9 yrs
Location:
UK & EU
Compensation:
As per Industry Standards
Skills / Experience
  •  Excellent communication and interpersonal skills
  •  9 years of experience in Verification with hands on in ASIC Verification, SV/UVM methodology
  •  Creative problem solving
  •  Team player
  •  Strong and effective presentation skills, able to operate at multiple levels including senior management
  •  Experience in SoC /IP level Verification needed
  •  CPU verification is added advantage
  •  Writing /debugging C and assembly tests desirable
  •  Excellent RTL debugging Skills
  •  Self-motivated
  •  Take ownership of problems
Send your resume to hr.eu@p-ctech.com to apply

Senior RTL Design Engineer
Department:
Semiconductors
Experience:
5+yrs
Location:
UK & EU
Compensation:
As per Industry Standards
Skills / Experience

You will have 5 or more years of experience in logic design with the following qualifications:

  •  RTL design using Verilog or SystemVerilog, assertion writing
  •  Design of state machines, data paths, arbitration and clock domain crossing logic
  •  Logic synthesis, timing constraints
  •  Exposure to Design For Test, understanding of scan concept and writing DFT friendly RTL
  •  Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking
  •  Prior experience in 10G/100G Ethernet design is a plus
Send your resume to hr.eu@p-ctech.com to apply

RTL Design Engineer
Department:
Semiconductors
Experience:
3+yrs
Location:
India, UK & EU
Compensation:
As per Industry Standards
Skills / Experience

You will have 3 or more years of experience in logic design with the following qualifications:

  •  RTL design using Verilog or SystemVerilog, assertion writing
  •  Design of state machines, data paths, arbitration and clock domain crossing logic
  •  Logic synthesis, timing constraints
  •  Exposure to Design For Test, understanding of scan concept and writing DFT friendly RTL
  •  Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking
  •  Prior experience in 10G/100G Ethernet design is a plus
Send your resume to hr.eu@p-ctech.com to apply

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